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3 nanometers: TSMC to start new chip production in September

Series production of the N3 process will start as planned in the second half of the year, but it will be too late for new 3 nm processors and graphics chips or cell phones in the fall.

 

The world’s largest contract chip manufacturer TSMC will start mass production of chips manufactured using the 3-nanometer process in September this year. This is reported by a local newspaper in Taiwan. TSMC is thus sticking to its own plans to mass-produce the first chips in the so-called N3 process in the second half of the year, but the start in September is a little later than the starts of previous generations – and too late for new processors, graphics cards and smartphones in this one Autumn.

According to a report by the Taiwanese Commercial Times the trial production of the N3 process has developed positively. TSMC customers therefore expect a higher chip yield (functional chips per manufactured wafer) than when the N5 process (5 nanometers) was introduced. In the second half of the third quarter, i.e. in October, it should be possible to significantly increase N3 wafer production.

Nevertheless, N3 production is starting too late for products that many manufacturers will present in the autumn for the year-end business, such as Apple with its new iPhone generation. The contract manufacturer already declared in April that N3 will only become relevant to sales in 2023, when TSMC announced chips with 3 nanometers in 2022 and 2 nanometers from 2025.

The N3 process shrinks transistors by up to 70 percent compared to the 5-nanometer N5 process, according to TSMC. The speed of corresponding chips increases by 15 percent with the same power consumption or the power consumption drops by 30 percent with the same speed.

The modified version N3E is planned for next year, which should further increase efficiency, relax the design rules and improve the yield of functional chips. The N3E process is expected to be ahead of schedule and full-scale production is expected to start as early as the second quarter of 2023.

TSMC continues to rely on the previous FinFET technology for the N3 manufacturing processes, but offers chip designers for N3 under the name “FinFlex” the choice in the arrangement of the fin-shaped field effect transistors (FinFETs). The developer should be able to choose between ultra-high performance, efficient performance and maximum energy efficiency for the chip cores.

However, TSMC is also aware that FinFETs are reaching their limits with the current structure sizes and, like all major chip manufacturers, is planning to switch to “Gate All Around” (GAA) technology, in which the gate electrode covers the conductive channel of the field effect transistor on all sides surrounds. However, the Taiwanese are waiting to make the change until the 2-nanometer generation in 2025. Samsung, on the other hand, has already started production with new GAA transistors using 3-nanometer technology. However, it is still unclear whether Samsung has already started mass production of ATMs.

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