PCIe 7.0 will offer an extraordinary speed of 512 GB / s
The PCI-SIG organization has announced the previous specifications of PCIe 7.0, the most advanced version of the local I/O bus that will arrive with stratospheric speeds in a premiere that will not occur before 2025.
PCI Express is fundamental to today’s computer architecture since it is used both for internal connection in the integrated circuits of the motherboards (chipsets) and the communication of components such as CPU, as well as to connect external cards (GPUs, SSD, sound, networks…) punctured in the corresponding slots or connectors. Here we have a guide to this bus in case you want to catch up.
PCIe 7.0 announced
You are probably still using solutions under PCIe 3.0, the most widespread version of the standard. But the technology industry does not rest, PCIe 4.0 is already adopted and PCIe 5.0 has started its deployment this year once Intel supports it with the Alder Lake platform and AMD will do so soon with AM4. The next version, 6.0, was announced last January and now another one arrives.
The announcement of the specifications for PCIe 7.0 has arrived at the event PCI-SIG Developers Conference 2022 where the organization responsible for this standard is celebrating its 30th anniversary. Its great improvement, as in previous standards, consists of double the bandwidth over the previous one up to a total performance of 128GT/s in one lane (x1).
This means that in a PCIe x16 slot, such as those used by dedicated graphics cards, the theoretical bi-directional performance can go up to 512GB/s. Another example of great performance would come for solid state drives or for Ethernet, up to 800 Gbe for data intensive segments.
In addition to the performance increase, other developments are expected such as a lower latency, superior RAS capabilities or enhancement of I/O virtualization to meet the increasing needs of the industry. The coding scheme will also be improved PAM4 released in version 6.0 to increase transfer rates.
This is what really allows the specification to achieve such high bandwidth. Technically, it modulates signals at four levels, packing two bits of information into a serial channel in the same amount of time. This PAM4 scheme is widely used in higher performance networks like enterprise InfiniBands and we have also seen it in GDDR6 group graphics memory.
Another improvement should come from smaller physical size of the bus, which would allow the production of smaller cards and not the monstrous sizes that we can find -for example- in today’s high-end dedicated graphics. This if more efficient cooling systems are achieved, it is understood, because the new generations of NVIDIA and AMD graphics will be great energy gobblers.
As is often the case with new standards, it will initially focus on solutions of data centers, industrial, automotive, military and aerospace applications. It will not reach consumers for several years. There are still no components (graphics cards and SSDs) that take advantage of PCIe 5.0 and even PCIe 4.0 is still in the minority compared to the millions of boards that use version 3.0.
In any case PCIe 7.0 is already underway and it is important because in the future it will become the only one of its kind for computer architecture, once the old ISA, AGP, the original PCI or a less and less SATA are left behind. used.
